Intel has processed over one million 300mm wafers using ASML’s High-NA EUV (extreme ultraviolet) scanners, according to a joint announcement made at the recent SPIE Photomask Technology and EUV Lithography conference in Monterey, California. These wafers are thin slices of silicon used to manufacture microchips, and High-NA EUV is a cutting-edge lithography technique that allows for the creation of smaller, more complex chip designs. ASML, a leading manufacturer of semiconductor equipment, reported that a total of 1.35 million High-NA wafers have been processed globally, meaning Intel is responsible for about three-quarters of that total. This milestone is particularly significant for Intel, which has seen its stock price rise nearly 155% year-to-date. The company has also been forming more partnerships, including investments from the U.S. government and Nvidia, which are interested in gaining access to Intel’s growing foundry business. Intel’s progress in this area marks its re-emergence as a key player in the semiconductor industry, despite earlier doubts about its ability to compete in the rapidly evolving AI market. The one million wafer figure includes various activities, such as Intel’s research and development projects, tool certification runs, and the production of its Core Ultra Series 3 CPUs, also known as Panther Lake. However, neither Intel nor ASML provided a specific number for the amount of commercial-grade Panther Lake wafers that have been produced. ASML’s head of High-NA product management, Greet Storms, mentioned that its EXE systems have collectively exposed more than 1.35 million wafers, with ten systems currently in use at four different customers and three more in the process of being delivered or installed. According to ASML, Intel accounts for roughly 74% of the total High-NA wafer exposure. This includes some of the world’s largest foundries, such as TSMC, Samsung, and SK Hynix. Intel’s leadership in High-NA EUV technology is notable, as it is the only company currently using High-NA systems for mass production of chips. ASML’s data suggests that Intel has handled most of the world’s High-NA wafer exposure by itself. In contrast, TSMC, one of the largest chipmakers, is not expected to begin High-NA volume production until 2030. Intel’s heavy investment in this expensive technology—each system can cost up to $350 million—could give it a significant competitive advantage in the semiconductor industry.